Basic Logic Gates and Digital Circuits Based on Flexible IGZO Enhancement-Mode nMOS TFTs

• Published in: IEEE journal on flexible electronics Vol. 3; no. 11; pp. 466 - 471
• Main Authors: Olguin-Leija, Pamela Gianna, Guizar, Pablo Gilberto Toledo, Luna, Isai Salvador Hernandez, Sanchez, Arturo Torres, Garcia, Rodolfo, Hernandez-Como, Norberto
• Format: Journal Article
• Language: English
• Published: IEEE 01.11.2024
• Subjects: Capacitors; Circuits; Combinational circuits; flexible electronics; indium–gallium–zinc oxide (IGZO); Inverters; Logic gates; Substrates; Thin film transistors; thin-film transistors (TFTs); Transistors
• ISSN: 2768-167X; 2768-167X
• DOI: 10.1109/JFLEX.2024.3408135

An increasing number of new applications beyond displays have been reported for amorphous oxide semiconductors, especially indium-gallium-zinc oxide (IGZO), based on flexible thin-film transistors (TFTs). The atomic composition of the IGZO target was In:Ga:Zn = 2:2:2. From sensors to microprocessors, the flexible IGZO TFTs aim to diversify the functionality of silicon legacy nodes. In this work, IGZO enhancement-mode nMOS TFTs, with a minimum channel length of <inline-formula> <tex-math notation="LaTeX">5 \, \mu </tex-math></inline-formula>m, were fabricated on flexible polyimide (PI) substrates at temperatures below 150 °C. We observed a small dependency of threshold voltage (<inline-formula> <tex-math notation="LaTeX">2.23 \, \pm \, 0.06 </tex-math></inline-formula> V) and saturation mobility (<inline-formula> <tex-math notation="LaTeX">3.74 \, \pm \, 0.57 </tex-math></inline-formula> cm2/V <inline-formula> <tex-math notation="LaTeX">\cdot </tex-math></inline-formula> s) with the channel width-to-length ratio. The IGZO TFTs were interconnected in the saturation load configuration for the successful demonstration of basic logic gates (inverter, NAND, and NOR gates), a seven-stage ring oscillator, an xor gate, and a half-adder. Due to this configuration, their output voltage was limited to VDD-VTH. Their electrical response was evaluated with direct and alternating voltages at a maximum input frequency of 500 Hz and a power supply of 5 V. Under ac analysis, their fall time/rise time were in the 3-43/148-212-<inline-formula> <tex-math notation="LaTeX">\mu </tex-math></inline-formula>s range. The inverter, as the fundamental building block for digital circuits, was also tested at different bending radii from 10 to 2.5 mm. Our results are oriented to a better understanding of the flexible IGZO TFT technology to reach reliable integrated circuits (ICs).