A universal large/small signal 3-terminal FET model using a nonquasistatic charge-based approach

• Published in: IEEE transactions on electron devices Vol. 40; no. 10; pp. 1723 - 1729
• Main Authors: Daniels, R.R., Yang, A.T., Harrang, J.P.
• Format: Journal Article
• Language: English
• Published: IEEE 01.10.1993
• Subjects: Circuit simulation; Computational modeling; Current measurement; Data mining; FETs; Frequency; Predictive models; Spline; Topology; Voltage
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/16.277326

Introduces a charge-based nonquasistatic large/small signal FET model that is extracted from measured small signal S-parameter and DC data and can be applied to an arbitrary three-terminal FET structure. The model is based on general physical principles, and provides consistent topologies for both large and small signal simulations to frequencies above f/sub t/ and over a wide range of node voltages. The procedure for extracting model elements includes deembedding linear parasitic elements and extracting bicubic, B-spline functions, which represent large signal model elements. The spline coefficients are calculated using a constrained least squares fit to a set of small signal parameters and/or DC currents that have been measured at a number of node voltage values. Advantages of this approach include fast parameter extraction for new FET structures, accuracy, computational efficiency, charge conservation, and the requirement of only a single model for all simulation modes. The model can also be used to interface device simulators (e.g., PISCES) with circuit simulators for accurate predictive modeling.< >