Positive Bias Temperature Instability Degradation of Buried InGaAs Channel nMOSFETs with InGaP Barrier Layer and Al2O3 Dielectric

Positive bias temperature instability stress induced interface trap density in a buried InGaAs channel metaloxide-semiconductor field-effect transistor with a InCaP barrier layer and Al2O3 dielectric is investigated. Well behaved split C-V characteristics with small capacitance frequency dispersion...

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Published in中国物理快报：英文版 Vol. 34; no. 5; pp. 101 - 105
Main Author 王盛凯 马磊 常虎东 孙兵 苏玉玉 钟乐 李海鸥 金智 刘新宇 刘洪刚
Format Journal Article
LanguageEnglish
Published 01.05.2017
Subjects
Al2O3
InGaAs
InGaP
不稳定性
偏压
温度
电介质
金属氧化物半导体场效应晶体管
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Summary:Positive bias temperature instability stress induced interface trap density in a buried InGaAs channel metaloxide-semiconductor field-effect transistor with a InCaP barrier layer and Al2O3 dielectric is investigated. Well behaved split C-V characteristics with small capacitance frequency dispersion are confirmed after the insertion of the InCaP barrier layer. The direct-current Id-Vg measurements show both degradations of positive gate voltage shift and sub-threshold swing in the sub-threshold region, and degradation of positive △Vg in the oncurrent region. The Id-Vg degradation during the positive bias temperature instability tests is mainly contributed by the generation of near interface acceptor traps under stress. Specifically, the stress induced aeceptor traps contain both permanent and recoverable traps. Compared with surface channel InCaAs devices, stress induced recoverable donor traps are negligible in the buried channel ones.
Bibliography:11-1959/O4
Positive bias temperature instability stress induced interface trap density in a buried InGaAs channel metaloxide-semiconductor field-effect transistor with a InCaP barrier layer and Al2O3 dielectric is investigated. Well behaved split C-V characteristics with small capacitance frequency dispersion are confirmed after the insertion of the InCaP barrier layer. The direct-current Id-Vg measurements show both degradations of positive gate voltage shift and sub-threshold swing in the sub-threshold region, and degradation of positive △Vg in the oncurrent region. The Id-Vg degradation during the positive bias temperature instability tests is mainly contributed by the generation of near interface acceptor traps under stress. Specifically, the stress induced aeceptor traps contain both permanent and recoverable traps. Compared with surface channel InCaAs devices, stress induced recoverable donor traps are negligible in the buried channel ones.
Sheng-Kai Wang1,2, Lei Ma2,3, Hu-Dong Chang1,2, Bing Sun1,2, Yu-Yu Su2, Le Zhong4, Hai-Ou Li3, Zhi Jin2, Xin-Yu Liu2, Hong-Gang Liu1,2（ 1Key Laboratory of Microelectronics Devices ＆ Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029 ;2High-Frequency High-Voltage Device and Integrated Circuits R＆D Center, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029 ;3 Guangxi Experiment Center of Information Science, Guilin University of Electronic Technology, Guilin 541004 ;4Microsystem and Terahertz Research Center, China Academy of Engineering Physics, Chengdu 610200）
ISSN:0256-307X
1741-3540
DOI:10.1088/0256-307X/34/5/057301