A 33 \mu W 64 \,\times\, 64 Pixel Vision Sensor Embedding Robust Dynamic Background Subtraction for Event Detection and Scene Interpretation

A 64 × 64-pixel ultra-low power vision sensor is presented, performing pixel-level dynamic background subtraction as the low-level processing layer of an algorithm for scene interpretation. The pixel embeds two digitally-programmable Switched-Capacitors Low-Pass Filters (SC-LPF) and two clocked comp...

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Bibliographic Details
Published inIEEE journal of solid-state circuits Vol. 48; no. 3; pp. 850 - 863
Main Authors Cottini, N., Gottardi, M., Massari, N., Passerone, R., Smilansky, Z.
Format Journal Article
LanguageEnglish
Published IEEE 01.03.2013
Subjects
Cameras
Clocks
CMOS vision sensors
energy autonomous low-power sensors
Heuristic algorithms
Low pass filters
low-power
Photodiodes
Robustness
Threshold voltage
visual processing
wireless sensor networks
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Summary:A 64 × 64-pixel ultra-low power vision sensor is presented, performing pixel-level dynamic background subtraction as the low-level processing layer of an algorithm for scene interpretation. The pixel embeds two digitally-programmable Switched-Capacitors Low-Pass Filters (SC-LPF) and two clocked comparators, aimed at detecting any anomalous behavior of the current photo-generated signal with respect to its past history. The 45 T, 26 μm square pixel has a fill-factor of 12%. The vision sensor has been fabricated in a 0.35 μm 2P3M CMOS process, powered with 3.3 V, and consumes 33 μ W at 13 fps, which corresponds to 620 pW/frame.pixel.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2012.2235031