APA (7th ed.) Citation

Wang, Z., Liu, Y., Lee, A., Su, F., Lo, C., Yuan, Z., . . . Yang, H. (2017). A 65-nm ReRAM-Enabled Nonvolatile Processor With Time-Space Domain Adaption and Self-Write-Termination Achieving > 4\times Faster Clock Frequency and > 6\times Higher Restore Speed. IEEE journal of solid-state circuits, 52(10), 2769-2785. https://doi.org/10.1109/JSSC.2017.2724024

Chicago Style (17th ed.) Citation

Wang, Zhibo, et al. "A 65-nm ReRAM-Enabled Nonvolatile Processor With Time-Space Domain Adaption and Self-Write-Termination Achieving > 4\times Faster Clock Frequency and > 6\times Higher Restore Speed." IEEE Journal of Solid-state Circuits 52, no. 10 (2017): 2769-2785. https://doi.org/10.1109/JSSC.2017.2724024.

MLA (9th ed.) Citation

Wang, Zhibo, et al. "A 65-nm ReRAM-Enabled Nonvolatile Processor With Time-Space Domain Adaption and Self-Write-Termination Achieving > 4\times Faster Clock Frequency and > 6\times Higher Restore Speed." IEEE Journal of Solid-state Circuits, vol. 52, no. 10, 2017, pp. 2769-2785, https://doi.org/10.1109/JSSC.2017.2724024.