SaDP Process Challenges and Solutions on NAND Flash Cell

• Published in: ECS transactions Vol. 60; no. 1; pp. 395 - 400
• Main Authors: Zhang, Yi-Ying, He, Qi-Yang, Zhang, Hai-Yang
• Format: Journal Article
• Language: English
• Published: 27.02.2014
• ISSN: 1938-5862; 1938-6737
• DOI: 10.1149/06001.0395ecst

Self-aligned double patterning (SaDP) technology has been successfully developed for three critical layers (AA, CG and M2) in NAND flash memories with 3X design rule. In SaDP process, the core performance is extremely critical for even/odd performance which will impact the final profile and etch depth. In this paper, we investigated two etch schemes for core etch. Results showed that scheme I, the traditional core etch, is capabable of forming the vertical core without top corner rounding. Howerer, the remained hard mask on the core top narrows down the subsequent spacer etch window which will influences the pattern transfer performance. Scheme II, with the removal of core hard mask during core etch, is proven to be superior from the point of view of pattern transfer. However, it’s challenging to get vertical and the core without sub-trench. After the optimization of the etch process, the core profile can be well controlled. Besides, the line-end cut process is a must item for SaDP process to separate the adjacent twin lines. Line-end cut could be completed after spacer patterning, final patterning or any other subsequent processes. For control gate (CG), cutting in the subsequent processes is a good choice to avoid the line end extension and AA damage.