2D Amorphous GaO X Gate Dielectric for β-Ga 2 O 3 Field-Effect Transistors

• Published in: ACS applied materials & interfaces Vol. 15; no. 31; pp. 37687 - 37695
• Main Authors: Moon, Sanghyun, Lee, Donggyu, Park, Jehwan, Kim, Jihyun
• Format: Journal Article
• Language: English
• Published: United States 09.08.2023
• Subjects: gallium oxide; two-dimensional materials; wide-bandgap semiconductors; field-effect transistors; gate dielectric
• ISSN: 1944-8244; 1944-8252
• DOI: 10.1021/acsami.3c07126

Appropriate gate dielectrics must be identified to fabricate metal-insulator-semiconductor field-effect transistors (MISFETs); however, this has been challenging for compound semiconductors owing to the absence of high-quality native oxides. This study uses the liquid-gallium squeezing technique to fabricate 2D amorphous gallium oxide (GaO ) with a high dielectric constant, where its thickness is precisely controlled at the atomic scale (monolayer, ∼4.5 nm; bilayer, ∼8.5 nm). Beta-phase gallium oxide (β-Ga O ) with an ultrawide energy bandgap (4.5-4.9 eV) has emerged as a next-generation power semiconductor material and is presented here as the channel material. The 2D amorphous GaO dielectric is combined with a β-Ga O conducting nanolayer, and the resulting β-Ga O MISFET is stable up to 250 °C. The 2D amorphous GaO is oxygen-deficient, and a high-quality interface with excellent uniformity and scalability forms between the 2D amorphous GaO and β-Ga O . The fabricated MISFET exhibits a wide gate-voltage swing of approximately +5 V, a high current on/off ratio, moderate field-effect carrier mobility, and a decent three-terminal breakdown voltage (∼138 V). The carrier transport of the Ni/GaO /β-Ga O metal-insulator-semiconductor (MIS) structure displays a combination of Schottky emission and Fowler-Nordheim (F-N) tunneling in the high-gate-bias region at 25 °C, whereas at elevated temperatures it shows Schottky emission and F-N tunneling in the low- and high-gate-bias regions, respectively. This study demonstrates that a 2D GaO gate dielectric layer can be produced and incorporated into an active channel layer to form an MIS structure at room temperature (∼25 °C), which enables the facile fabrication of MISFET devices.