The UK5000 - successful collaborative development of an integrated design system for a 5000 gate CMOS array with built-in test

• Published in: Annual ACM IEEE Design Automation Conference: Proceedings of the 20th conference on Design automation; 27-29 June 1983 pp. 629 - 636
• Main Authors: Grierson, J. R., Cosgrove, B., Daniel, R., Halliwell, R. E., Kirk, I. H., Knight, J. C., McLean, J. A., McGrail, J. M., Newton, C. O.
• Format: Conference Proceeding
• Language: English
• Published: Piscataway, NJ, USA IEEE Press 27.06.1983
• Series: ACM Conferences
• Subjects: Hardware > Hardware test; Hardware > Robustness; Hardware > Very large scale integration design > Application-specific VLSI designs; Human-centered computing > Collaborative and social computing > Collaborative and social computing theory, concepts and paradigms > Computer supported cooperative work; Social and professional topics > Professional topics > Computing and business > Computer supported cooperative work; Social and professional topics > Professional topics > Management of computing and information systems > Project and people management > Systems development
• ISBN: 0818600268; 9780818600265
• DOI: 10.5555/800032.800736

Following a UK Department of Industry initiative, the UK5000 project was launched in July 1981 on a 2 year timescale by 7 autonomous UK organizations with different computer systems. The activity involved the collaborative development of an integrated design system for a 5000 gate CMOS array. The DA system was to be portable and capable of generating layouts and test programs from logic circuit descriptions in a time of the order of one week. The CMOS array is unique in containing rows of dedicated bistables, preformed on chip into a shift loop for scan path testing with a totally synchronous clocking scheme. The dedicated bistables, clock lines, shift loops etc, together with the synchronous design lead to lower routeing requirements, elimination of timing hazards and excellent testability.