Formal design verification of digital systems

• Published in: Annual ACM IEEE Design Automation Conference: Proceedings of the 20th conference on Design automation; 27-29 June 1983 pp. 228 - 234
• Main Author: Wojcik, Anthony S.
• Format: Conference Proceeding
• Language: English
• Published: Piscataway, NJ, USA IEEE Press 27.06.1983
• Series: ACM Conferences
• Subjects: Applied computing > Arts and humanities > Architecture (buildings) > Computer-aided design; Applied computing > Physical sciences and engineering > Engineering > Computer-aided design; Hardware > Hardware validation > Functional verification > Simulation and emulation; Software and its engineering > Software creation and management > Software verification and validation > Formal software verification; Software and its engineering > Software organization and properties > Software functional properties > Formal methods
• ISBN: 0818600268; 9780818600265
• DOI: 10.5555/800032.800668

In present design automation systems, the standard approach that is taken to verify the correctness of proposed logic designs is that of simulation. However, due to several difficulties that arise as simulation is applied to more complex systems, designers have searched for other techniques to at least augment this traditional approach. The purpose of this paper is to briefly describe a research project to develop a formal design verification system using the Argonne Automated Reasoning Assistant (AURA). Some results of this investigation are presented, together with a discussion of some of the problems that have been encountered and plans for future work.