Run-Time Power Modelling in Embedded GPUs with Dynamic Voltage and Frequency Scaling
This paper investigates the application of a robust CPU-based power modelling methodology that performs an automatic search of explanatory events derived from performance counters to embedded GPUs. A 64-bit Tegra TX1 SoC is configured with DVFS enabled and multiple CUDA benchmarks are used to train...
Saved in:
Main Authors | , , , |
---|---|
Format | Journal Article |
Language | English |
Published |
18.06.2020
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | This paper investigates the application of a robust CPU-based power modelling
methodology that performs an automatic search of explanatory events derived
from performance counters to embedded GPUs. A 64-bit Tegra TX1 SoC is
configured with DVFS enabled and multiple CUDA benchmarks are used to train and
test models optimized for each frequency and voltage point. These optimized
models are then compared with a simpler unified model that uses a single set of
model coefficients for all frequency and voltage points of interest. To obtain
this unified model, a number of experiments are conducted to extract
information on idle, clock and static power to derive power usage from a single
reference equation. The results show that the unified model offers competitive
accuracy with an average 5\% error with four explanatory variables on the test
data set and it is capable to correctly predict the impact of voltage,
frequency and temperature on power consumption. This model could be used to
replace direct power measurements when these are not available due to hardware
limitations or worst-case analysis in emulation platforms. |
---|---|
DOI: | 10.48550/arxiv.2006.12176 |