Raman and Photocurrent Imaging of Electrical Stress-Induced p–n Junctions in Graphene

Electrostatically doped graphene p–n junctions can be formed by applying large source–drain and source–gate biases to a graphene field-effect transistor, which results in trapped charges in part of the channel gate oxide. We measure the temperature distribution in situ during the electrical stress a...

Full description

Saved in:
Bibliographic Details
Published inACS nano Vol. 5; no. 7; pp. 5848 - 5854
Main Authors Rao, Gayathri, Freitag, Marcus, Chiu, Hsin-Ying, Sundaram, Ravi S, Avouris, Phaedon
Format Journal Article
LanguageEnglish
Published United States American Chemical Society 26.07.2011
Subjects
Channels
Electrical junctions
Graphene
Nanostructure
Photocurrent
Photoelectric effect
Position (location)
Segments
electrical stress
electronic
Raman
graphene
photocurrent
Online AccessGet full text

Cover

More Information
Summary:Electrostatically doped graphene p–n junctions can be formed by applying large source–drain and source–gate biases to a graphene field-effect transistor, which results in trapped charges in part of the channel gate oxide. We measure the temperature distribution in situ during the electrical stress and characterize the resulting p–n junctions by Raman spectroscopy and photocurrent microscopy. Doping levels, the size of the doped graphene segments, and the abruptness of the p–n junctions are all extracted. Additional voltage probes can limit the length of the doped segments by acting as heat sinks. The spatial location of the identified potential steps coincides with the position where a photocurrent is generated, confirming the creation of p–n junctions.
Bibliography:ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 23
ISSN:1936-0851
1936-086X
DOI:10.1021/nn201611r