Prolonging PCM lifetime through energy-efficient, segment-aware, and wear-resistant page allocation
Improving the endurance of Phase change memory (PCM) is a fundamental issue when the technology is considered as an alternative to main memory usage. Existing wear-leveling techniques overcome this challenge through constantly remapping hot virtual pages, engendering a fair amount of extra write ope...
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Published in | 2014 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED) pp. 327 - 330 |
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Main Authors | , , , |
Format | Conference Proceeding |
Language | English |
Published |
ACM
01.08.2014
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Subjects | |
Online Access | Get full text |
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Summary: | Improving the endurance of Phase change memory (PCM) is a fundamental issue when the technology is considered as an alternative to main memory usage. Existing wear-leveling techniques overcome this challenge through constantly remapping hot virtual pages, engendering a fair amount of extra write operations to PCM and imposing considerable energy overhead. Our observation is that it is unnecessary to fully balance the accesses to different physical pages during the execution of each process. Instead, since endurance is a lifetime factor, the hot virtual pages of different processes can be mapped to different physical pages in the PCM. Leveraging this property, we develop a wear-resistant page allocation algorithm, which exploits the diverse write characteristics of different program segments to improve PCM write endurance within almost no extra remapping cost. Experimental results show that the proposed technique can prolong PCM lifetime by hundreds of times with nearly zero searching and remapping overhead. |
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DOI: | 10.1145/2627369.2627667 |