Toward High-Performance Digital Logic Technology with Carbon Nanotubes

• Published in: ACS nano Vol. 8; no. 9; pp. 8730 - 8745
• Main Authors: Tulevski, George S, Franklin, Aaron D, Frank, David, Lobez, Jose M, Cao, Qing, Park, Hongsik, Afzali, Ali, Han, Shu-Jen, Hannon, James B, Haensch, Wilfried
• Format: Journal Article
• Language: English
• Published: United States American Chemical Society 23.09.2014
• Subjects: post-CMOS; carbon nanotubes; logic
• ISSN: 1936-0851; 1936-086X
• DOI: 10.1021/nn503627h

The slow-down in traditional silicon complementary metal-oxide–semiconductor (CMOS) scaling (Moore’s law) has created an opportunity for a disruptive innovation to bring the semiconductor industry into a postsilicon era. Due to their ultrathin body and ballistic transport, carbon nanotubes (CNTs) have the intrinsic transport and scaling properties to usher in this new era. The remaining challenges are largely materials-related and include obtaining purity levels suitable for logic technology, placement of CNTs at very tight (∼5 nm) pitch to allow for density scaling and source/drain contact scaling. This review examines the potential performance advantages of a CNT-based computing technology, outlines the remaining challenges, and describes the recent progress on these fronts. Although overcoming these issues will be challenging and will require a large, sustained effort from both industry and academia, the recent progress in the field is a cause for optimism that these materials can have an impact on future technologies.