Multibit Data Storage States Formed in Plasma-Treated MoS2 Transistors

• Published in: ACS nano Vol. 8; no. 4; pp. 4023 - 4032
• Main Authors: Chen, Mikai, Nam, Hongsuk, Wi, Sungjin, Priessnitz, Greg, Gunawan, Ivan Manuel, Liang, Xiaogan
• Format: Journal Article
• Language: English
• Published: United States American Chemical Society 22.04.2014
• Subjects: memory; MoS2; transistor; 2D layers; plasma etching; charge trapping
• ISSN: 1936-0851; 1936-086X
• DOI: 10.1021/nn501181t

New multibit memory devices are desirable for improving data storage density and computing speed. Here, we report that multilayer MoS2 transistors, when treated with plasmas, can dramatically serve as low-cost, nonvolatile, highly durable memories with binary and multibit data storage capability. We have demonstrated binary and 2-bit/transistor (or 4-level) data states suitable for year-scale data storage applications as well as 3-bit/transistor (or 8-level) data states for day-scale data storage. This multibit memory capability is hypothesized to be attributed to plasma-induced doping and ripple of the top MoS2 layers in a transistor, which could form an ambipolar charge-trapping layer interfacing the underlying MoS2 channel. This structure could enable the nonvolatile retention of charged carriers as well as the reversible modulation of polarity and amount of the trapped charge, ultimately resulting in multilevel data states in memory transistors. Our Kelvin force microscopy results strongly support this hypothesis. In addition, our research suggests that the programming speed of such memories can be improved by using nanoscale-area plasma treatment. We anticipate that this work would provide important scientific insights for leveraging the unique structural property of atomically layered two-dimensional materials in nanoelectronic applications.