Timed Automata as a Formalism for Expressing Security: A Survey on Theory and Practice

Timed automata are a common formalism for the verification of concurrent systems subject to timing constraints. They extend finite-state automata with clocks, that constrain the system behavior in locations, and to take transitions. While timed automata were originally designed for safety (in the wi...

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Bibliographic Details
Published inACM computing surveys Vol. 55; no. 6; pp. 1 - 36
Main Authors Arcile, Johan, André, Étienne
Format Journal Article
LanguageEnglish
Published New York, NY ACM 31.07.2023
Association for Computing Machinery
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Summary:Timed automata are a common formalism for the verification of concurrent systems subject to timing constraints. They extend finite-state automata with clocks, that constrain the system behavior in locations, and to take transitions. While timed automata were originally designed for safety (in the wide sense of correctness w.r.t. a formal property), they were progressively used in a number of works to guarantee security properties. In this work, we review works studying security properties for timed automata over the past two decades. We notably review theoretical works, with a particular focus on opacity, as well as more practical works, with a particular focus on attack trees and their extensions. We derive main conclusions concerning open perspectives, as well as tool support.
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ISSN:0360-0300
1557-7341
DOI:10.1145/3534967