Performance and Stability Enhancement of In–Sn–Zn–O TFTs Using SiO2 Gate Dielectrics Grown by Low Temperature Atomic Layer Deposition

• Published in: ACS applied materials & interfaces Vol. 9; no. 49; pp. 42928 - 42934
• Main Authors: Sheng, Jiazhen, Han, Ju-Hwan, Choi, Wan-Ho, Park, Jozeph, Park, Jin-Seong
• Format: Journal Article
• Language: English
• Published: American Chemical Society 13.12.2017
• Subjects: silicon oxide; ITZO; PEALD; TFT; hydrogen
• ISSN: 1944-8244; 1944-8252
• DOI: 10.1021/acsami.7b15419

Silicon dioxide (SiO2) films were synthesized by plasma-enhanced atomic layer deposition (PEALD) using BTBAS [bis­(tertiarybutylamino) silane] as the precursor and O2 plasma as the reactant, at a temperature range from 50 to 200 °C. While dielectric constant values larger than 3.7 are obtained at all deposition temperatures, the leakage current levels are drastically reduced to below 10–12 A at temperatures above 150 °C, which are similar to those obtained in thermally oxidized and PECVD grown SiO2. Thin film transistors (TFTs) based on In–Sn–Zn-O (ITZO) semiconductors were fabricated using thermal SiO2, PECVD SiO2, and PEALD SiO2 grown at 150 °C as the gate dielectrics, and superior device performance and stability are observed in the last case. A linear field effect mobility of 68.5 cm2/(V s) and a net threshold voltage shift (ΔV th) of approximately 1.2 V under positive bias stress (PBS) are obtained using the PEALD SiO2 as the gate insulator. The relatively high concentration of hydrogen in the PEALD SiO2 is suggested to induce a high carrier density in the ITZO layer deposited onto it, which results in enhanced charge transport properties. Also, it is most likely that the hydrogen atoms have passivated the electron traps related to interstitial oxygen defects, thus resulting in improved stability under PBS. Although the PECVD SiO2 contains a hydrogen concentration similar to that of PEALD SiO2, its relatively large surface roughness appears to induce scattering effects and the generation of electron traps, which result in inferior device performance and stability.