Timely: Pushing Data Movements And Interfaces In Pim Accelerators Towards Local And In Time Domain

• Published in: 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA) pp. 832 - 845
• Main Authors: Li, Weitao, Xu, Pengfei, Zhao, Yang, Li, Haitong, Xie, Yuan, Lin, Yingyan
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.05.2020
• Subjects: Analog Processing; Computational efficiency; Costs; Digital-analog conversion; Energy conservation; Energy efficiency; Internet of Things; Memory management; Neural networks; Processing In Memory; Resistive-Random-Access-Memory (Reram); Throughput; Time-domain analysis
• DOI: 10.1109/ISCA45697.2020.00073

Resistive-random-access-memory (ReRAM) based processing-in-memory (\mathrm{R}^{2}\mathrm{P}\mathrm{I}\mathrm{M}) accelerators show promise in bridging the gap between Internet of Thing devices' constrained resources and Convolutional/Deep Neural Networks' (CNNs/DNNs') prohibitive energy cost. Specifically, \mathrm{R}^{2}\mathrm{P}\mathrm{I}\mathrm{M} accelerators enhance energy efficiency by eliminating the cost of weight movements and improving the computational density through ReRAM's high density. However, the energy efficiency is still limited by the dominant energy cost of input and partial sum (Psum) movements and the cost of digital-to-analog (D/A) and analog-to-digital (AD) interfaces. In this work, we identify three energy-saving opportunities in \mathrm{R}^{2}\mathrm{P}\mathrm{I}\mathrm{M} accelerators: analog data locality, time-domain interfacing, and input access reduction, and propose an innovative \mathrm{R}^{2}\mathrm{P}\mathrm{I}\mathrm{M} accelerator called TIMELY, with three key contributions: (1) TIMELY adopts analog local buffers (ALBs) within ReRAM crossbars to greatly enhance the data locality, minimizing the energy overheads of both input and Psum movements; (2) TIMELY largely reduces the energy of each single D/A (and AD) conversion and the total number of conversions by using time-domain interfaces (TDIs) and the employed ALBs, respectively; (3) we develop an only-once input read (\mathrm{O}^{2}\mathrm{I}\mathrm{R}) mapping method to further decrease the energy of input accesses and the number of D/A conversions. The evaluation with more than 10 CNN/DNN models and various chip configurations shows that, TIMELY outperforms the baseline \mathrm{R}^{2}\mathrm{P}\mathrm{I}\mathrm{M} accelerator, PRIME, by one order of magnitude in energy efficiency while maintaining better computational density (up to 31.2\times) and throughput (up to 736.6\times). Furthermore, comprehensive studies are performed to evaluate the effectiveness of the proposed ALB, TDI, and \mathrm{O}^{2}\mathrm{I}\mathrm{R} in terms of energy savings and area reduction.