The TM3270 Media-Processor

• Published in: 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'05) pp. 331 - 342
• Main Authors: van de Waerdt, Jan-Willem, Vassiliadis, Stamatis, Das, Sanjeev, Mirolo, Sebastian, Yen, Chris, Zhong, Bill, Basto, Carlos, van Itegem, Jean-Paul, Amirtharaj, Dinesh, Kalra, Kulbhushan, Rodriguez, Pedro, van Antwerpen, Hans
• Format: Conference Proceeding
• Language: English
• Published: Washington, DC, USA IEEE Computer Society 12.11.2005; IEEE
• Series: ACM Conferences
• Subjects: Code standards; Computer systems organization > Architectures > Parallel architectures > Very long instruction word; Computer systems organization > Architectures > Serial architectures > Complex instruction set computing; Computer systems organization > Architectures > Serial architectures > Reduced instruction set computing; Costs; Energy consumption; Hardware > Integrated circuits; Instruction sets; MPEG 4 Standard; Prefetching; Silicon; Streaming media; Video codecs; VLIW
• ISBN: 9780769524405; 0769524400
• ISSN: 1072-4451
• DOI: 10.1109/MICRO.2005.35

We present the TM3270 media-processor, the latest TriMedia VLIW processor, tuned to address the performance demands of standard definition video processing, combined with embedded processor requirements for the consumer market. We discuss the architecture, implementation, and its first realization in a 90 nm process technology. The processor incorporates instruction set architectural (ISA) extensions and a load/store unit optimized for the video-processing domain. The ISA extensions improve the performance on video processing kernels. The data cache policies and prefetching techniques allow for efficient access to multimedia data. Finally, power consumption and performance data are presented.