Managing power and performance for System-on-Chip designs using Voltage Islands

• Published in: Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design pp. 195 - 202
• Main Authors: Lackey, David E., Zuchowski, Paul S., Bednar, Thomas R., Stout, Douglas W., Gould, Scott W., Cohn, John M.
• Format: Conference Proceeding
• Language: English
• Published: New York, NY, USA ACM 10.11.2002; IEEE
• Series: ACM Conferences
• Subjects: Applied sciences; Computer systems organization > Architectures; Design. Technologies. Operation analysis. Testing; Electronics; Exact sciences and technology; Integrated circuits; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Software and its engineering > Software creation and management > Software development process management > Software development methods; Performance evaluation; System architecture; Power consumption; Circuit design; Performance requirement; Integrated circuit; Product development; System on a chip; Computer aided design; Implementation

This paper discusses Voltage Islands, a system architecture and chip implementation methodology, that can be used to dramatically reduce active and static power consumption for System-on-Chip (SoC) designs. As technology scales for increased circuit density and performance, the need to reduce power...