The effect on RISC performance of register set size and structure versus code generation strategy

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Bibliographic Details
Published inProceedings of the 18th annual international symposium on Computer architecture pp. 330 - 339
Main Authors Bradlee, David G., Eggers, Susan J., Henry, Robert R.
Format Conference Proceeding
LanguageEnglish
Published New York, NY, USA ACM 01.04.1991
IEEE
SeriesACM Conferences
Subjects
Computer science
Computer systems organization > Architectures
Contracts
Coprocessors
Delay
General and reference > Cross-computing tools and techniques > Performance
Hardware > Electronic design automation > High-level and register-transfer level synthesis
Performance loss
Permission
Pipelines
Processor scheduling
Reduced instruction set computing
Registers
Software and its engineering > Software notations and tools > Compilers > Source code generation
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ISBN:9780897913942
0897913949
DOI:10.1145/115952.115985