Exploiting the Routing Flexibility for Energy/Performance Aware Mapping of Regular NoC Architectures

• Published in: Design, Automation, and Test in Europe: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1; 03-07 Mar. 2003 p. 10688
• Main Authors: Hu, Jingcao, Marculescu, Radu
• Format: Conference Proceeding
• Language: English
• Published: Washington, DC, USA IEEE Computer Society 03.03.2003
• Series: ACM Conferences
• Subjects: Hardware > Very large scale integration design > Application-specific VLSI designs > Application specific processors; Networks > Network properties > Network structure; Networks > Network protocols > Network layer protocols > Routing protocols
• ISBN: 0769518702; 9780769518701
• ISSN: 1530-1591
• DOI: 10.5555/789083.1022804

In this paper, we present an algorithm which automatically maps the IPs onto a generic regular Network on Chip (NoC) architecture and constructs a deadlock-free deterministic routing function such that the total communication energy is minimized. At the same time, the performance of the resulting communication system is guaranteed to satisfy the specified constraints through bandwidth reservation. As the main contribution, we first formulate the problem of energy/performance aware mapping, in a topological sense, and show how the routing flexibility can be exploited to expand the solution space and improve the solution quality. An efficient branch-and-bound algorithm is then described to solve this problem. Experimental results show that the proposed algorithm is very fast, and significant energy savings can be achieved. For instance, for a complex video/audio application, 51.7% energy savings have been observed, on average, compared to an ad-hoc implementation.