Extraction of circuit models for substrate cross-talk

• Published in: International Conference on Computer Aided Design: Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design; 05-09 Nov. 1995 pp. 199 - 206
• Main Authors: Smedes, T., van der Meijs, N. P., van Genderen, A. J.
• Format: Conference Proceeding
• Language: English
• Published: Washington, DC, USA IEEE Computer Society 01.12.1995
• Series: ACM Conferences
• Subjects: Applied computing > Physical sciences and engineering; Computing methodologies > Modeling and simulation > Model development and analysis > Modeling methodologies; Hardware > Electronic design automation > Physical design (EDA); Substrate Cross-talk; Boundary Element Method; Green's Function; Layout Verification
• ISBN: 9780818672132; 0818672137
• DOI: 10.5555/224841.224881

An increasingly urgent topic for the realization of densely packed (mixed signal) integrated circuits is prevention of cross-talk via the substrate. This paper proposes a Boundary Element Method (BEM) for calculating an admittance matrix for the substrate in order to analyze the parasitic coupling during layout verification.In contrast with standard BE methods, we propose a Green's function which is specific to the domain and the problem. This allows minimal discretization and a direct extraction of circuit models for the cross-talk. The extraction can be combined with an efficient model reduction technique to obtain more simple, yet accurate models for the cross-talk. The complete extraction process has a linear time complexity and a constant memory usage. The method is fully implemented and integrated in an existing layout-to-circuit extractor.