Double-gate SOI devices for low-power and high-performance applications

• Published in: International Conference on Computer Aided Design: Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design; 06-10 Nov. 2005 pp. 217 - 224
• Main Authors: Roy, K., Mahmoodi, H., Mukhopadhyay, S., Ananthan, H., Bansal, A., Cakici, T.
• Format: Conference Proceeding
• Language: English
• Published: Washington, DC, USA IEEE Computer Society 31.05.2005; IEEE; ACM
• Series: ACM Conferences
• Subjects: Applied sciences; Electrical engineering. Electrical power engineering; Electronic equipment and fabrication. Passive components, printed wiring boards, connectics; Electronics; Exact sciences and technology; Hardware; Hardware > Emerging technologies; Hardware > Hardware validation; Hardware > Very large scale integration design; Molecular electronics, nanoelectronics; Networks; Networks > Network types; Networks > Network types > Ad hoc networks; Networks > Network types > Ad hoc networks > Mobile ad hoc networks; Power electronics, power supplies; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Transistors; Performance evaluation; High performance; MOSFET; Scalability; Dynamic circuit; Dual gate transistor; Amplifier; Switching; Nanoelectronics; Self aligned technology; Logic circuit; Silicon on insulator technology; Gating circuits; Trigger; Energy dissipation; Complementary MOS technology; Power device; Capacitance; Critical path; Planar device; Low-power electronics

Double-gate (DG) transistors have emerged as promising devices for nano-scale circuits due to their better scalability compared to bulk CMOS. Among the various types of DG devices, quasi-planar SOI FinFETs are easier to manufacture compared to planar double-gate devices. DG devices with independent...