Power and performance evaluation of globally asynchronous locally synchronous processors

• Published in: Proceedings - International Symposium on Computer Architecture pp. 158 - 168
• Main Authors: Iyer, Anoop, Marculescu, Diana
• Format: Conference Proceeding
• Language: English
• Published: Washington, DC, USA IEEE Computer Society 01.05.2002; IEEE
• Series: ACM Conferences
• Subjects: Applied sciences; Electronics; Exact sciences and technology; Hardware > Communication hardware, interfaces and storage > Buses and high-speed links; Hardware > Robustness; Integrated circuits; Integrated circuits by function (including memories and processors); Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Asynchronism; Simulation; Superscalar processor

Due to shrinking technologies and increasing design sizes, it is becoming more difficult and expensive to distribute a global clock signal with low skew throughout a processor die. Asynchronous processor designs do not suffer from this problem since they do not have a global clock. However, a paradi...