State re-encoding for peak current minimization

In a synchronous finite state machine (FSM), huge current peaks are often observed at the moment of state transition. Previous low power state encoding algorithms focus on the reduction of switching activities of state registers (i.e., state bits). However, even though the switching state registers...

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Published inInternational Conference on Computer Aided Design: Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design : San Jose, California; 05-09 Nov. 2006 pp. 33 - 38
Main Authors Huang, Shih-Hsu, Chang, Chia-Ming, Nieh, Yow-Tyng
Format Conference Proceeding
LanguageEnglish
Published 05.11.2006
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Summary:In a synchronous finite state machine (FSM), huge current peaks are often observed at the moment of state transition. Previous low power state encoding algorithms focus on the reduction of switching activities of state registers (i.e., state bits). However, even though the switching state registers are the same, different combinations of switching directions still result in different peak currents. Based on that observation, in this paper, we propose the first approach to re-encode an FSM by considering the switching directions of state registers in order to minimize the peak current caused by the state transition. Experimental data consistently show that the peak current is reduced with no penalty.
Bibliography:SourceType-Conference Papers & Proceedings-1
ObjectType-Conference Paper-1
content type line 25
ISBN:1595933891
9781595933898
ISSN:1092-3152
DOI:10.1145/1233501.1233509