Emulated electrically erasable (EEE) memory and method of operation
A system has an emulation memory having a plurality of sectors for storing information. A controller calculates a number of addresses used divided by a number of valid records in a predetermined address range of the emulation memory. An amount of remaining addresses in a currently used space of the...
Saved in:
Main Authors | , , |
---|---|
Format | Patent |
Language | English |
Published |
25.12.2012
|
Online Access | Get full text |
Cover
Loading…
Abstract | A system has an emulation memory having a plurality of sectors for storing information. A controller calculates a number of addresses used divided by a number of valid records in a predetermined address range of the emulation memory. An amount of remaining addresses in a currently used space of the emulation memory which have not been used to store information is calculated. A determination is made whether the calculation is greater than a first predetermined number and whether the amount of remaining addresses is greater than a second predetermined number. If both the fraction is greater than the first predetermined number and the amount of remaining addresses is greater than the second predetermined number, any subsequent update requests are responded to using the currently used space of the emulation memory. Otherwise a compression of the emulation memory is required by copying valid data to an available sector. |
---|---|
AbstractList | A system has an emulation memory having a plurality of sectors for storing information. A controller calculates a number of addresses used divided by a number of valid records in a predetermined address range of the emulation memory. An amount of remaining addresses in a currently used space of the emulation memory which have not been used to store information is calculated. A determination is made whether the calculation is greater than a first predetermined number and whether the amount of remaining addresses is greater than a second predetermined number. If both the fraction is greater than the first predetermined number and the amount of remaining addresses is greater than the second predetermined number, any subsequent update requests are responded to using the currently used space of the emulation memory. Otherwise a compression of the emulation memory is required by copying valid data to an available sector. |
Author | Chandrasekaran, Venkatagiri Scouller, Ross S Baker, Jr, Frank K |
Author_xml | – sequence: 1 givenname: Ross S surname: Scouller fullname: Scouller, Ross S – sequence: 2 givenname: Frank K surname: Baker, Jr fullname: Baker, Jr, Frank K – sequence: 3 givenname: Venkatagiri surname: Chandrasekaran fullname: Chandrasekaran, Venkatagiri |
BookMark | eNrjYmDJy89L5WRwds0tzUksSU1RSM1JTS4pykxOzMmpVEgtSixOTMpJVdBwdXXVVMhNzc0vqlRIzEsBMksy8lMU8tMU8guAqkoy8_N4GFjTEnOKU3mhNDeDgptriLOHbmlxAdDovJLi-PSiRBBlYGFsYmhsbmRMhBIAABc0Tg |
ContentType | Patent |
CorporateAuthor | Freescale Semiconductor, Inc |
CorporateAuthor_xml | – name: Freescale Semiconductor, Inc |
DBID | EFH |
DatabaseName | USPTO Issued Patents |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EFH name: USPTO Issued Patents url: http://www.uspto.gov/patft/index.html sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
ExternalDocumentID | 08341372 |
GroupedDBID | EFH |
ID | FETCH-uspatents_grants_083413723 |
IEDL.DBID | EFH |
IngestDate | Sun Mar 05 22:30:53 EST 2023 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | English |
LinkModel | DirectLink |
MergedId | FETCHMERGED-uspatents_grants_083413723 |
OpenAccessLink | https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8341372 |
ParticipantIDs | uspatents_grants_08341372 |
PatentNumber | 8341372 |
PublicationCentury | 2000 |
PublicationDate | 20121225 |
PublicationDateYYYYMMDD | 2012-12-25 |
PublicationDate_xml | – month: 12 year: 2012 text: 20121225 day: 25 |
PublicationDecade | 2010 |
PublicationYear | 2012 |
References | Peri et al. (6904400) 20050600 PCT Application No. PCT/US2011/031084, International Search Report and Written Opinion, dated Nov. 30, 2011. Harari et al. (2003/0093711) 20030500 Miyatake et al. (2007/0014007) 20070100 (1237085) 20020900 Przybylek (2007/0143528) 20070600 Nallapa (7058755) 20060600 |
References_xml | – year: 20070600 ident: 2007/0143528 contributor: fullname: Przybylek – year: 20060600 ident: 7058755 contributor: fullname: Nallapa – year: 20030500 ident: 2003/0093711 contributor: fullname: Harari et al. – year: 20020900 ident: 1237085 – year: 20070100 ident: 2007/0014007 contributor: fullname: Miyatake et al. – year: 20050600 ident: 6904400 contributor: fullname: Peri et al. |
Score | 2.872433 |
Snippet | A system has an emulation memory having a plurality of sectors for storing information. A controller calculates a number of addresses used divided by a number... |
SourceID | uspatents |
SourceType | Open Access Repository |
Title | Emulated electrically erasable (EEE) memory and method of operation |
URI | https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8341372 |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1LS8NAEB5qEdSTomJ9sQcPelgNafeRc0kIgtKDQm9ls7vx0jxIUkr_vTOJFC963YXdYYadbwdmvg_gQQhtbWQVN8p7PjOR45kJLZfT0BihpVMBDTi_vcv0c_a6FMsRpPtZmAKfEa_RlvZ509Zd1TdXYnofAs8H8mfiCCyJfWBbrivjFi5_0ZSOFSbjAx1Qa1-cpCdwhEfgl63s2l-gkZzC4aJfPYORL89hHhckleUdG6RnyDvrHfONaWl8iT1i2fXECup83TGs79kg7syqnFW1HwJ1ASyJP-Yp39-4-mqok2UV_Fg2vYQxVvT-CphCULChs2FmJNG7R0Fm1czIXGgtbZBNYPLnMdf_7N3AMeJ5L1YSilsYd83G3yFmdtl975Bvry53yQ |
link.rule.ids | 230,309,783,805,888,64367 |
linkProvider | USPTO |
linkToPdf | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV07T8MwED5VBUGZQIAoTw8MMBiiNLaTuTQKryoDSN0ix3ZYmoeSVKj_vucEVSyw2pJ9upPv8yfdfQdwy5ivVKAElcIY6slA01S6ivKJKyXzuRaObXB-n_Po03tZsMUAom0vTI7PiFZoS_Owaqq27IorMb33gae9-LPVCCys-sB3sSyljnX26Nt0LDAZ7yDG8o6ShdEB7OMh-Gkr2uYXbISHsBt3q0cwMMUxTGe5HZZlNOmHz1j_LNfE1LKxDUzkDonXPclt7euaIMMn_XhnUmakrEwfqhMg4exjGtHtjclXbWtZEufHtskpDJHTmzMgAmFBuVq5qeRW4D1wUiU8yTPm-1w56RjGfx5z_s_eDezFT2Hy9jx_vYARgns3ucRllzBs65W5QgBt0-vONxu8x3rG |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Emulated+electrically+erasable+%28EEE%29+memory+and+method+of+operation&rft.inventor=Scouller%2C+Ross+S&rft.inventor=Baker%2C+Jr%2C+Frank+K&rft.inventor=Chandrasekaran%2C+Venkatagiri&rft.number=8341372&rft.date=2012-12-25&rft.externalDBID=n%2Fa&rft.externalDocID=08341372 |