Mechanisms for synchronizing data transfers between non-uniform memory architecture computers

• Main Authors: Dykema, Greg L, Bassett, David H, Lach, Joel L
• Format: Patent
• Language: English
• Published: 14.08.2012

A first node includes a DMA engine for transferring data specified by a sequence of control blocks to a second node. When a control block does not require synchronization between memories, the DMA engine sends an end of transfer (EOT) message after the last datum, increments an EOT counter, and proc...