Phase-change random access memories capable of suppressing coupling noise during read-while-write operation

A semiconductor memory device includes at least one write global bit line connected to a plurality of local bit lines and at least one read global bit line connected to the local bit lines. The phase-change memory device having the write global bit line and the read global bit line suppress coupling...

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Main Authors Choi, Byung-gil, Cho, Beak-hyung
Format Patent
LanguageEnglish
Published 19.04.2011
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Abstract A semiconductor memory device includes at least one write global bit line connected to a plurality of local bit lines and at least one read global bit line connected to the local bit lines. The phase-change memory device having the write global bit line and the read global bit line suppress coupling noise generated during a read-while-write operation.
AbstractList A semiconductor memory device includes at least one write global bit line connected to a plurality of local bit lines and at least one read global bit line connected to the local bit lines. The phase-change memory device having the write global bit line and the read global bit line suppress coupling noise generated during a read-while-write operation.
Author Choi, Byung-gil
Cho, Beak-hyung
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Snippet A semiconductor memory device includes at least one write global bit line connected to a plurality of local bit lines and at least one read global bit line...
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Title Phase-change random access memories capable of suppressing coupling noise during read-while-write operation
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