Cascode compensation circuit and method for amplifier stability
The present invention provides compensation for circuits. In one embodiment, a compensation circuit has a first terminal coupled to an output terminal of the circuit and a second terminal coupled to feed back the output voltage to an internal node. A damping circuit may also be coupled to the output...
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Format | Patent |
Language | English |
Published |
01.02.2011
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Abstract | The present invention provides compensation for circuits. In one embodiment, a compensation circuit has a first terminal coupled to an output terminal of the circuit and a second terminal coupled to feed back the output voltage to an internal node. A damping circuit may also be coupled to the output terminal. The damping circuit adds a pole and a zero to the transfer function of the circuit. In one embodiment, the damping circuit modifies the effect of the output impedance of a load on the transfer function to increase the phase margin of the circuit such that the circuit remains stable over an increased range of output capacitor values. |
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AbstractList | The present invention provides compensation for circuits. In one embodiment, a compensation circuit has a first terminal coupled to an output terminal of the circuit and a second terminal coupled to feed back the output voltage to an internal node. A damping circuit may also be coupled to the output terminal. The damping circuit adds a pole and a zero to the transfer function of the circuit. In one embodiment, the damping circuit modifies the effect of the output impedance of a load on the transfer function to increase the phase margin of the circuit such that the circuit remains stable over an increased range of output capacitor values. |
Author | Castello, Rinaldo Venca, Alessandro Ottini, Daniele Rezzi, Francesco |
Author_xml | – sequence: 1 givenname: Alessandro surname: Venca fullname: Venca, Alessandro – sequence: 2 givenname: Daniele surname: Ottini fullname: Ottini, Daniele – sequence: 3 givenname: Francesco surname: Rezzi fullname: Rezzi, Francesco – sequence: 4 givenname: Rinaldo surname: Castello fullname: Castello, Rinaldo |
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References | B.K. Ahuja, "An Improved Frequency Compensation Technique for CMOS Operational Amplifiers", IEEE Journal of Solid-State Circuits, vol. 18, Issue 6, Dec. 1983, pp. 629-633. Yao Libin, "Fast Settling CMOS Two-Stage Operational Transconductance Amplifiers and Their Systematic Design", IEEE Symposium on Circuits and Systems, vol. 2, May 26-29, 2002, pp. II-839-II-842. M. Yavari et al., "Hybrid Cascode Compensation for Two-Stage CMOS Operational Amplifiers", IEEE Symposium on Circuits and Systems. vol. 2, May 2005, pp. 1565-1568. Li et al. (7248117) 20070700 R.J. Reay et al., "An Unconditionally Stable Two-Stage CMOS Amplifier", IEEE Journal of Solid-State Circuits, vol. 30, Issue 5, May 1995, pp. 591-594. M. Yavari, "Systematic and Optimal Design of CMOS Two-Stage Opamps with Hybrid Cascode Compensation", Proceedings Design, Automation and Test in Europe, vol. 1, Mar. 6-10, 2006, p. 6. D.B. Ribner et al, "Design Techniques for Cascoded CMOS Op Amps With Improved PSRR and Common-Mode Input Range", IEEE Journal of Solid-State Circuits, vol. 19, Issue 6, Dec. 1984, pp. 919-925. |
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Snippet | The present invention provides compensation for circuits. In one embodiment, a compensation circuit has a first terminal coupled to an output terminal of the... |
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Title | Cascode compensation circuit and method for amplifier stability |
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