Sample-and-hold amplifiers

A sample-and-hold amplifier is provided. The sample-and-hold amplifier comprises a sample-and-hold circuit and a buffer circuit. The sample-and-hold circuit receives an input signal and transmits the input signal to a first node according to a control signal. The buffer circuit is coupled between a...

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Main Author Chou, Yu-Kai
Format Patent
LanguageEnglish
Published 07.12.2010
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Abstract A sample-and-hold amplifier is provided. The sample-and-hold amplifier comprises a sample-and-hold circuit and a buffer circuit. The sample-and-hold circuit receives an input signal and transmits the input signal to a first node according to a control signal. The buffer circuit is coupled between a supply voltage source and a ground and controlled by the first node to provide an output signal at an output node. The buffer circuit comprises a native MOS transistor coupled to the output node.
AbstractList A sample-and-hold amplifier is provided. The sample-and-hold amplifier comprises a sample-and-hold circuit and a buffer circuit. The sample-and-hold circuit receives an input signal and transmits the input signal to a first node according to a control signal. The buffer circuit is coupled between a supply voltage source and a ground and controlled by the first node to provide an output signal at an output node. The buffer circuit comprises a native MOS transistor coupled to the output node.
Author Chou, Yu-Kai
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References Michalski (7019580) 20060300
Huang (2007/0103207) 20070500
Zuk (3675144) 19720700
Pehlke (6522194) 20030200
Dingwall et al. (4594560) 19860600
(2 298 979) 19960900
Nagaraj (5990744) 19991100
Thim (4713676) 19871200
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Snippet A sample-and-hold amplifier is provided. The sample-and-hold amplifier comprises a sample-and-hold circuit and a buffer circuit. The sample-and-hold circuit...
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