Electrostatic discharge protection circuit and terminating resistor circuit
Disclosed is an electrostatic discharge protection circuit capable of realizing speeding up of differential signals by reducing a capacitance of the circuit. Transmission lines are connected to an IN terminal and an IN Bar terminal and differential signals are input to the terminals. The ESD protect...
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Main Authors | , , , , |
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Format | Patent |
Language | English |
Published |
07.09.2010
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Online Access | Get full text |
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Abstract | Disclosed is an electrostatic discharge protection circuit capable of realizing speeding up of differential signals by reducing a capacitance of the circuit. Transmission lines are connected to an IN terminal and an IN Bar terminal and differential signals are input to the terminals. The ESD protection circuit is connected to the transmission lines and protects an internal circuit from a surge voltage applied to the IN terminal and the IN Bar terminal. A pair of transistors of the ESD protection circuit is formed in the same well. Thereby, when differential signals transit, charges in drains of the pair of transistors holding a state before a transition transfer in the same well. As a result, the capacitances in the drains of the pair of transistors are reduced with respect to the transition of differential signals so that the speeding up of differential signals can be realized. |
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AbstractList | Disclosed is an electrostatic discharge protection circuit capable of realizing speeding up of differential signals by reducing a capacitance of the circuit. Transmission lines are connected to an IN terminal and an IN Bar terminal and differential signals are input to the terminals. The ESD protection circuit is connected to the transmission lines and protects an internal circuit from a surge voltage applied to the IN terminal and the IN Bar terminal. A pair of transistors of the ESD protection circuit is formed in the same well. Thereby, when differential signals transit, charges in drains of the pair of transistors holding a state before a transition transfer in the same well. As a result, the capacitances in the drains of the pair of transistors are reduced with respect to the transition of differential signals so that the speeding up of differential signals can be realized. |
Author | Akiyama, Yutaka Otsuka, Kanji Usami, Tamotsu Tanba, Yuko Ito, Tsuneo |
Author_xml | – sequence: 1 givenname: Kanji surname: Otsuka fullname: Otsuka, Kanji – sequence: 2 givenname: Tamotsu surname: Usami fullname: Usami, Tamotsu – sequence: 3 givenname: Yutaka surname: Akiyama fullname: Akiyama, Yutaka – sequence: 4 givenname: Tsuneo surname: Ito fullname: Ito, Tsuneo – sequence: 5 givenname: Yuko surname: Tanba fullname: Tanba, Yuko |
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ContentType | Patent |
CorporateAuthor | Kabushiki Kaisha Toshiba Fujitsu Microelectronics Limited Kyocera Corporation Fuji Xerox Co., Ltd Renesas Technology Corp OKI Semiconductor Co., Ltd |
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References | Ding et al. (2007/0290713) 20071200 Kerr (6815980) 20041100 (2004-071991) 20040300 Otsuka et al. (2005/0040846) 20050200 |
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Snippet | Disclosed is an electrostatic discharge protection circuit capable of realizing speeding up of differential signals by reducing a capacitance of the circuit.... |
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Title | Electrostatic discharge protection circuit and terminating resistor circuit |
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