Write control method for a memory array configured with multiple memory subarrays
Write control circuitry and control method are provided for a memory array configured with multiple memory subarrays. The write control circuitry includes multiple subarray write controllers associated with the multiple memory subarrays, each subarray write controller selectively enabling a local wr...
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Main Authors | , , , |
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Format | Patent |
Language | English |
Published |
30.03.2010
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Online Access | Get full text |
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