Biasing circuit for pass transistor for voltage level translator circuit
A pass transistor signal level translator between a first voltage level and a higher second voltage level having a bias circuit for the pass transistor including a first switching circuit coupled to the first voltage level for providing a bias voltage that is less than the first voltage level. A sec...
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| Main Author | |
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| Format | Patent |
| Language | English |
| Published |
23.02.2010
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| Online Access | Get full text |
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| Summary: | A pass transistor signal level translator between a first voltage level and a higher second voltage level having a bias circuit for the pass transistor including a first switching circuit coupled to the first voltage level for providing a bias voltage that is less than the first voltage level. A second switching circuit is coupled to the second voltage level for providing a pulse at substantially the second voltage to the bias voltage. A voltage clamping circuit is coupled between the bias voltage and a reference voltage. |
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