Thin film transistor array panel and method for fabricating the same

The present invention relates to a TFT array panel and a fabricating method thereof. A gate insulating layer and a passivation layer are formed by printing organic insulating material in order to simplify the fabricating process. The inventive TFT panel includes an insulating substrate, and a gate w...

Full description

Saved in:
Bibliographic Details
Main Authors Byun, Jae-Seong, Lee, Kun-Jong, Lim, Hyun-Su, Cha, Jong-Hwan, Jung, Bae-Hyoun
Format Patent
LanguageEnglish
Published 25.12.2007
Online AccessGet full text

Cover

Abstract The present invention relates to a TFT array panel and a fabricating method thereof. A gate insulating layer and a passivation layer are formed by printing organic insulating material in order to simplify the fabricating process. The inventive TFT panel includes an insulating substrate, and a gate wire formed on the insulating substrate. The gate wire includes a gate line and a gate pad connected to one end of the gate line. A gate insulating layer is formed on the insulating substrate while exposing the gate pad and a portion of the gate line close to the gate pad. A semiconductor pattern is formed on the gate insulating layer. A data wire is formed on the gate insulating layer. The data wire includes a data line, a source electrode connected to the data line, a drain electrode facing the source electrode and a data pad connected to one end of the data line. A passivation layer is formed on the gate insulating layer while exposing the data pad and a portion of the data line close to the data pad.
AbstractList The present invention relates to a TFT array panel and a fabricating method thereof. A gate insulating layer and a passivation layer are formed by printing organic insulating material in order to simplify the fabricating process. The inventive TFT panel includes an insulating substrate, and a gate wire formed on the insulating substrate. The gate wire includes a gate line and a gate pad connected to one end of the gate line. A gate insulating layer is formed on the insulating substrate while exposing the gate pad and a portion of the gate line close to the gate pad. A semiconductor pattern is formed on the gate insulating layer. A data wire is formed on the gate insulating layer. The data wire includes a data line, a source electrode connected to the data line, a drain electrode facing the source electrode and a data pad connected to one end of the data line. A passivation layer is formed on the gate insulating layer while exposing the data pad and a portion of the data line close to the data pad.
Author Lee, Kun-Jong
Cha, Jong-Hwan
Byun, Jae-Seong
Lim, Hyun-Su
Jung, Bae-Hyoun
Author_xml – sequence: 1
  givenname: Jae-Seong
  surname: Byun
  fullname: Byun, Jae-Seong
– sequence: 2
  givenname: Kun-Jong
  surname: Lee
  fullname: Lee, Kun-Jong
– sequence: 3
  givenname: Hyun-Su
  surname: Lim
  fullname: Lim, Hyun-Su
– sequence: 4
  givenname: Jong-Hwan
  surname: Cha
  fullname: Cha, Jong-Hwan
– sequence: 5
  givenname: Bae-Hyoun
  surname: Jung
  fullname: Jung, Bae-Hyoun
BookMark eNqNjDsOwjAMQDPAUD538AWQCkXqAYCKA3RHhjpNpMSpbDNwezJwAKY3vKe3cSsuTI27jiEy-JgymCBrVCsCKIIfWJApAfIEmSyUCXxVHp8SX2iRZ7BAoJhp59Yek9L-x62D4TZe7oe3LmjEpo-5zivavjuezn3b_ZF8AXkMNSY
ContentType Patent
CorporateAuthor Samsung Electronics Co., Ltd
CorporateAuthor_xml – name: Samsung Electronics Co., Ltd
DBID EFH
DatabaseName USPTO Issued Patents
DatabaseTitleList
Database_xml – sequence: 1
  dbid: EFH
  name: USPTO Issued Patents
  url: http://www.uspto.gov/patft/index.html
  sourceTypes: Open Access Repository
DeliveryMethod fulltext_linktorsrc
ExternalDocumentID 07312470
GroupedDBID EFH
ID FETCH-uspatents_grants_073124703
IEDL.DBID EFH
IngestDate Sun Mar 05 22:37:32 EST 2023
IsOpenAccess true
IsPeerReviewed false
IsScholarly false
Language English
LinkModel DirectLink
MergedId FETCHMERGED-uspatents_grants_073124703
OpenAccessLink https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7312470
ParticipantIDs uspatents_grants_07312470
PatentNumber 7312470
PublicationCentury 2000
PublicationDate 20071225
PublicationDateYYYYMMDD 2007-12-25
PublicationDate_xml – month: 12
  year: 2007
  text: 20071225
  day: 25
PublicationDecade 2000
PublicationYear 2007
References English Abstract for Publication No.: 07-134314
(1999-0083412) 19991100
(2001-075126) 20010300
English Abstract for Publication No. 09-312334.
Baek et al. (6524876) 20030200
(2000-150906) 20000500
(2001-0037335) 20010500
(09-101538) 19970400
English Abstract for Publication No.: 03-102324
Kwak (7102160) 20060900
(03-102324) 19910400
English Abstract for Publication No.: 09-101538
(2001037334) 20010500
(07-134314) 19950500
Togashi (4345249) 19820800
Hong et al. (6696324) 20040200
(102000001758) 20000100
English Abstract for Publication No. 102000001758.
(09-312334) 19971200
English Abstract for Publication No. 1999-0045543.
(08-023101) 19960100
Baek et al. (6493048) 20021200
English Abstract for Publication No.: 08-023101
Park et al. (6287899) 20010900
English Abstract for Publication No. 2000-150906.
(1999-0045543) 19990600
Park et al. (6678018) 20040100
References_xml – year: 19820800
  ident: 4345249
  contributor:
    fullname: Togashi
– year: 19990600
  ident: 1999-0045543
– year: 20040100
  ident: 6678018
  contributor:
    fullname: Park et al.
– year: 19970400
  ident: 09-101538
– year: 19910400
  ident: 03-102324
– year: 20060900
  ident: 7102160
  contributor:
    fullname: Kwak
– year: 20000100
  ident: 102000001758
– year: 20040200
  ident: 6696324
  contributor:
    fullname: Hong et al.
– year: 19991100
  ident: 1999-0083412
– year: 19950500
  ident: 07-134314
– year: 20000500
  ident: 2000-150906
– year: 20010300
  ident: 2001-075126
– year: 19971200
  ident: 09-312334
– year: 19960100
  ident: 08-023101
– year: 20010500
  ident: 2001-0037335
– year: 20030200
  ident: 6524876
  contributor:
    fullname: Baek et al.
– year: 20010900
  ident: 6287899
  contributor:
    fullname: Park et al.
– year: 20010500
  ident: 2001037334
– year: 20021200
  ident: 6493048
  contributor:
    fullname: Baek et al.
Score 2.6960044
Snippet The present invention relates to a TFT array panel and a fabricating method thereof. A gate insulating layer and a passivation layer are formed by printing...
SourceID uspatents
SourceType Open Access Repository
Title Thin film transistor array panel and method for fabricating the same
URI https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7312470
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1LSwMxEB5qEdSTomJ9MQev0WTfnrXLIig9KPRWsrtJEXbTspsi_fdOslK8aI4JTELC5JtJZr4BuMtCLl0ZEVYKzl1KTsSyKuRMpTIOlKgF9z-mr29J8RG9zOP5CIpdLkxLasTWtJb-ftOv7coHV9L1Phw8G8ifHUegcewDX6ZZyXpW64c0JKRKyXnfy7gL7ZrmxREckAgy2Yztf4FGfgz7M997AiNlTuHZlchE_dm0aB1AeH4OlF0nt0gqqRokpx6His5IpiRqWQ41fMwSyUzDXrbqDDCfvj8VbDflYtm5UJYF_1laeA5jcunVBWAiVFSRa6N1rSNqZVLJTApH5halj7GcwORPMZf_jF3BoX97FAEL4msY226jbgg0bXnrd-QbH4x3CA
link.rule.ids 230,309,786,808,891,64394
linkProvider USPTO
linkToPdf http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1LT8MwDLamgXicQIAYTx-4BpK-ObNV5TX1ANJuVdomE1LXTW0nxL_HSdHEBXJMJCdK5Hx2Yn8GuIlcLk0ZEZYLzk1KjseiwuVMhdJ3lCgFtz-mr9MgefeeZv5sAMkmF2ZBasRWtJb2dt2uuqUNrqTrvT941pM_G47A2rAPfNbVUpZpqe9Cl5AqJOd9y2CsYdGfxMk-7JIQMtrqrv0FG_EBbKe29xAGqj6CsSmSifqjWmBnIMIydKBsGvmFpJSqQnLrsa_pjGRMopZ5X8WnniMZatjKhToGjCdvDwnbTJnNGxPMkvGfxbknMCSnXp0CBkJ5BTk3Wpfao5YHhYykMHRuXnjvyxGM_hRz9s_YNeyk4zh7eZw-n8OefYgUDnP8Cxh2zVpdEoJ2-ZXdnG8ebnoC
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Thin+film+transistor+array+panel+and+method+for+fabricating+the+same&rft.inventor=Byun%2C+Jae-Seong&rft.inventor=Lee%2C+Kun-Jong&rft.inventor=Lim%2C+Hyun-Su&rft.inventor=Cha%2C+Jong-Hwan&rft.inventor=Jung%2C+Bae-Hyoun&rft.number=7312470&rft.date=2007-12-25&rft.externalDBID=n%2Fa&rft.externalDocID=07312470