Integrated circuit and method of manufacture
An integrated circuit having a plurality of active areas separated from each other by a field region and a method for manufacturing the integrated circuit. A first polysilicon finger is formed over the first active area and the field region and a second polysilicon finger is formed over the second a...
Saved in:
Main Author | |
---|---|
Format | Patent |
Language | English |
Published |
02.10.2007
|
Online Access | Get full text |
Cover
Loading…
Abstract | An integrated circuit having a plurality of active areas separated from each other by a field region and a method for manufacturing the integrated circuit. A first polysilicon finger is formed over the first active area and the field region and a second polysilicon finger is formed over the second active area and the field region. A first dielectric layer is formed over the first active area and the field region and a second dielectric layer is formed over the second active area and the portion of the first dielectric layer over the field region. A first electrical interconnect is formed over and dielectrically isolated from the first polysilicon finger and a second electrical interconnect is formed over and dielectrically isolated from the second active area. The second electrical interconnect is electrically coupled to the second polysilicon finger. |
---|---|
AbstractList | An integrated circuit having a plurality of active areas separated from each other by a field region and a method for manufacturing the integrated circuit. A first polysilicon finger is formed over the first active area and the field region and a second polysilicon finger is formed over the second active area and the field region. A first dielectric layer is formed over the first active area and the field region and a second dielectric layer is formed over the second active area and the portion of the first dielectric layer over the field region. A first electrical interconnect is formed over and dielectrically isolated from the first polysilicon finger and a second electrical interconnect is formed over and dielectrically isolated from the second active area. The second electrical interconnect is electrically coupled to the second polysilicon finger. |
Author | Chan, Darin A |
Author_xml | – sequence: 1 givenname: Darin A surname: Chan fullname: Chan, Darin A |
BookMark | eNrjYmDJy89L5WTQ8cwrSU0vSixJTVFIzixKLs0sUUjMS1HITS3JyE9RyE9TyE3MK01LTC4pLUrlYWBNS8wpTuWF0twMCm6uIc4euqXFBUAT8kqK44FGgSgDcyNzM3NTU2MilAAAX68siw |
ContentType | Patent |
CorporateAuthor | Advanced Micro Devices, Inc |
CorporateAuthor_xml | – name: Advanced Micro Devices, Inc |
DBID | EFH |
DatabaseName | USPTO Issued Patents |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EFH name: USPTO Issued Patents url: http://www.uspto.gov/patft/index.html sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
ExternalDocumentID | 07276755 |
GroupedDBID | EFH |
ID | FETCH-uspatents_grants_072767553 |
IEDL.DBID | EFH |
IngestDate | Sun Mar 05 22:35:09 EST 2023 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | English |
LinkModel | DirectLink |
MergedId | FETCHMERGED-uspatents_grants_072767553 |
OpenAccessLink | https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7276755 |
ParticipantIDs | uspatents_grants_07276755 |
PatentNumber | 7276755 |
PublicationCentury | 2000 |
PublicationDate | 20071002 |
PublicationDateYYYYMMDD | 2007-10-02 |
PublicationDate_xml | – month: 10 year: 2007 text: 20071002 day: 02 |
PublicationDecade | 2000 |
PublicationYear | 2007 |
References | Niimi et al. (6730566) 20040500 (0 252 179) 19880100 Lucas (6287951) 20010900 Ito (2002/0081794) 20020600 Ohno (2004/0219753) 20041100 |
References_xml | – year: 20020600 ident: 2002/0081794 contributor: fullname: Ito – year: 20040500 ident: 6730566 contributor: fullname: Niimi et al. – year: 20010900 ident: 6287951 contributor: fullname: Lucas – year: 19880100 ident: 0 252 179 – year: 20041100 ident: 2004/0219753 contributor: fullname: Ohno |
Score | 2.688843 |
Snippet | An integrated circuit having a plurality of active areas separated from each other by a field region and a method for manufacturing the integrated circuit. A... |
SourceID | uspatents |
SourceType | Open Access Repository |
Title | Integrated circuit and method of manufacture |
URI | https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7276755 |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1BS8MwFH5sQ1BPiorTKTl4NNotTZqex0oVlB0UdpOkSWHg2tE2-Pf3kurwoqdAQh4vCcl7L_neF4C7SLOSGzWlXM4YjYskoUpbRX1SlSh0JNPAs_3yKvL3-HnFVwPI97kwG9xGdIu6tA-u3XZ1AFfi8d4vPO3Jnz1HYOXZB76qz1qZpSkf0Q6j78uHMJSRh_YtsvwYDlEEumxV1_4yGtkJHCxD7SkMbHUG908_zAyGFOumcOuOYBhP-j-cSV2SjaqcTzRwjT0Hki3e5jndi_7Arr6IvlVgFzDC0N1eAokVE8xME1EYg_NgVSq49SgUoXUqpRrD-E8xV_-0XcNRuGP0D9mzCYy6xtkbNI6dvg0j3wFeEm-B |
link.rule.ids | 230,309,783,805,888,64375 |
linkProvider | USPTO |
linkToPdf | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1LT8MwDLbGQDxOIEAbzxw4EujWJm3PsKrjMfUA0m5TXpUmsXbqQ_x9nBQmLnCKlCiWZSuxHdtfAG486edMixFl0dingQpDKqQR1DZVcSW9KHY4268znr4HT3M270G66YVZ4TGia-SlvmvrdVO64kq83jvF0w782WIEFhZ94LP4KIXOdH6Pdhh9X7YF2zYVZYv7Jkl6AHtIBJ22oql_mY3kEHYyN3sEPVMcw-30B5tBE7WsVLtsCAbypPvFmZQ5WYmita0GbWVOgCSTt4eUbkgvcKsdvG8m_FPoY_BuBkAC4XNfj0KutEZJGBFzZmwdCpcyjiIxhOGfZM7-WbuG3ewxWbxMZ8_nsO8eHG1We3wB_aZqzSVaykZeOSF8AQQicn0 |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Integrated+circuit+and+method+of+manufacture&rft.inventor=Chan%2C+Darin+A&rft.number=7276755&rft.date=2007-10-02&rft.externalDBID=n%2Fa&rft.externalDocID=07276755 |