Latch-based random access memory (LBRAM) with tri-state banking and contention avoidance
A disclosed memory, such as a random access memory (RAM) has multiple banks including a first bank and a second bank each having multiple latch cells configured to store data. The first bank has a first bit line, and the second bank has a second bit line. A first tri-state buffer has an input node c...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
19.06.2007
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Online Access | Get full text |
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