Method for forming integrated advanced semiconductor device using sacrificial stress layer

An integrated advanced method for forming a semiconductor device utilizes a sacrificial stress layer as part of a film stack that enables spatially selective silicide formation in the device. The low-resistance portion of the device to be silicided includes NMOS transistors and PMOS transistors. The...

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Bibliographic Details
Main Authors Hsu, Ju-Wang, Tsai, Ming-Huan, Chen, Chien-Hao, Huang, Yi-Chun
Format Patent
LanguageEnglish
Published 29.05.2007
Online AccessGet full text

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