Command multiplier for built-in-self-test

Disclosed is a flexible command multiplication scheme for the built-in-self test (BIST) of a high-speed embedded memory array that segments BIST functionality into remote lower-speed executable instructions and local higher-speed executable instructions. A stand-alone BIST logic controller operates...

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Bibliographic Details
Main Authors Fales, Jonathan R, Fredeman, Gregory J, Gorman, Kevin W, Jacunski, Mark D, Kirihata, Toshiaki, Norris, Alan D, Parries, Paul C, Wordeman, Matthew R
Format Patent
LanguageEnglish
Published 20.03.2007
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Summary:Disclosed is a flexible command multiplication scheme for the built-in-self test (BIST) of a high-speed embedded memory array that segments BIST functionality into remote lower-speed executable instructions and local higher-speed executable instructions. A stand-alone BIST logic controller operates at a lower frequency and communicates with a command multiplier using a low-speed BIST instruction seed set. The command multiplier uses offset or directive registers to drive a logic unit or ALU to generate "n" sets of CAD information which are then time-multiplexed to the embedded memory at a speed "n" times faster than the BIST operating speed.