Integrated circuit packages with reduced stress on die and associated substrates, assemblies, and systems

Mechanical stresses are reduced between an electronic component having relatively low fracture toughness and a substrate having relatively greater fracture toughness. In an embodiment, the component may be a die having mounting contacts formed of a low yield strength material, such as solder. A pack...

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Main Authors Agraharam, Sairam, Hanna, Carlton, Atluri, Vasudeva, He, Dongming
Format Patent
LanguageEnglish
Published 24.01.2006
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Abstract Mechanical stresses are reduced between an electronic component having relatively low fracture toughness and a substrate having relatively greater fracture toughness. In an embodiment, the component may be a die having mounting contacts formed of a low yield strength material, such as solder. A package substrate has columnar lands formed of a relatively higher yield strength material, such as copper, having a relatively higher melting point than the component contacts and having a relatively high current-carrying capacity. The component contacts may be hemispherical in shape. The lands may be substantially cylinders, truncated cones or pyramids, inverted truncated cones or pyramids, or other columnar shapes. Methods of fabrication, as well as application of the package to an electronic assembly and to an electronic system, are also described.
AbstractList Mechanical stresses are reduced between an electronic component having relatively low fracture toughness and a substrate having relatively greater fracture toughness. In an embodiment, the component may be a die having mounting contacts formed of a low yield strength material, such as solder. A package substrate has columnar lands formed of a relatively higher yield strength material, such as copper, having a relatively higher melting point than the component contacts and having a relatively high current-carrying capacity. The component contacts may be hemispherical in shape. The lands may be substantially cylinders, truncated cones or pyramids, inverted truncated cones or pyramids, or other columnar shapes. Methods of fabrication, as well as application of the package to an electronic assembly and to an electronic system, are also described.
Author Hanna, Carlton
Agraharam, Sairam
Atluri, Vasudeva
He, Dongming
Author_xml – sequence: 1
  givenname: Sairam
  surname: Agraharam
  fullname: Agraharam, Sairam
– sequence: 2
  givenname: Carlton
  surname: Hanna
  fullname: Hanna, Carlton
– sequence: 3
  givenname: Vasudeva
  surname: Atluri
  fullname: Atluri, Vasudeva
– sequence: 4
  givenname: Dongming
  surname: He
  fullname: He, Dongming
BookMark eNqNjs0KwjAQhHPQg3_vsA-gIIilPYuid--SJqsutmnJbBDf3rT4AJ5mmG8GZm4moQs8M3IJyo9olT05iS6JUm_dyz4Y9BZ9UmSfXKbQyAB1gbww2eDJAp2TcYpUZ54t1kPMbd3I6HMNHyi3WJrp3Tbg1U8Xhk7H6-G8SejzMChu-ccg26Iqq31Z7P6ofAFvfEO0
ContentType Patent
CorporateAuthor Intel Corporation
CorporateAuthor_xml – name: Intel Corporation
DBID EFH
DatabaseName USPTO Issued Patents
DatabaseTitleList
Database_xml – sequence: 1
  dbid: EFH
  name: USPTO Issued Patents
  url: http://www.uspto.gov/patft/index.html
  sourceTypes: Open Access Repository
DeliveryMethod fulltext_linktorsrc
ExternalDocumentID 06989586
GroupedDBID EFH
ID FETCH-uspatents_grants_069895863
IEDL.DBID EFH
IngestDate Sun Mar 05 22:32:17 EST 2023
IsOpenAccess true
IsPeerReviewed false
IsScholarly false
Language English
LinkModel DirectLink
MergedId FETCHMERGED-uspatents_grants_069895863
OpenAccessLink https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6989586
ParticipantIDs uspatents_grants_06989586
PatentNumber 6989586
PublicationCentury 2000
PublicationDate 20060124
PublicationDateYYYYMMDD 2006-01-24
PublicationDate_xml – month: 01
  year: 2006
  text: 20060124
  day: 24
PublicationDecade 2000
PublicationYear 2006
References Lan et al. (2003/0034565) 20030200
Sota (6201707) 20010300
Huang et al. (6571245) 20030500
Chen et al. (2003/0157747) 20030800
Harper, Electronic Packaging Interconnection Handbook, 1991, McGraw-Hill, 5.1-5.5.
Wolf et al., Silicon Processing for the VLSI Era, 2000, vol. I, Lattice Press, 719-727, 791-795.
References_xml – year: 20010300
  ident: 6201707
  contributor:
    fullname: Sota
– year: 20030200
  ident: 2003/0034565
  contributor:
    fullname: Lan et al.
– year: 20030800
  ident: 2003/0157747
  contributor:
    fullname: Chen et al.
– year: 20030500
  ident: 6571245
  contributor:
    fullname: Huang et al.
Score 2.63472
Snippet Mechanical stresses are reduced between an electronic component having relatively low fracture toughness and a substrate having relatively greater fracture...
SourceID uspatents
SourceType Open Access Repository
Title Integrated circuit packages with reduced stress on die and associated substrates, assemblies, and systems
URI https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6989586
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1LSwMxEB7aIqgnRcX6IgePRtPtPuJZuqyC0oNCb7K7k8CizZbNLv37TrJt8aKnhExIPiZMJpPHF4BbqSYCdSR5ovNHHmKAPA-Ckks9EVOli0SgO9F9fYuzj_BlES0GkO3ewizJjPiKsNj7zq7a2l-upOm9H3jekz87jkDj2AfW5rvOcY76wX2EGMl4CEMp3NW-WZodwj41QUs209pfTiM9gr25Lz2GgTInUD1vmRmQlVVTdlXLKGD9IiSWue1Q1jgaVZL27zdYbRhWilGoz_KNEp2QMHtGWXvnitWSkPo8Vetpme0psHT2_pTxHa5P6tclYoN_egYjivvVOTCyRHL_EpH0RmZWFIlStHzSYSREnsQ4hvGfzVz8I7uEg-0-QhBewahtOnVNnrUtbrzafgCfwIb6
link.rule.ids 230,309,783,805,888,64367
linkProvider USPTO
linkToPdf http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1LT8MwDLbGQDxOIECMZw4cCWRdX5yBquMx9QDSblNbJ1IFa6emFX8fJ90mLnBKFVfpF0eu7Ty-AFyHcihQeSEPVHrPXXSQp46T81ANxUiqLBBoVnTfJn784T5PvWkP4vVZmDmZEV8QFn3b6kVT2c2V9HvvBp535M-GI7A07APf5VeVYoLqzlyE6IX-BmySj_VtShbFe7BDjVDQVjb6l9uI9mErsbUH0JPlIRTjFTcDsryo87ZoGKWsn4RFMzMhympDpErS7gQHq0qGhWSU7LN0qUYjJNSWU1bfmGo5J6z2mV7riJn1EbDo6f0h5mtcM_quKcSyB6Nj6FPmL0-AkS1SABAikubI0LIskJICKOV6QqSBjwMY_NnM6T-yK9hOHqPZ63jycga7q0kFxz2HflO38oLcbJNdWg3-AGTDifc
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Integrated+circuit+packages+with+reduced+stress+on+die+and+associated+substrates%2C+assemblies%2C+and+systems&rft.inventor=Agraharam%2C+Sairam&rft.inventor=Hanna%2C+Carlton&rft.inventor=Atluri%2C+Vasudeva&rft.inventor=He%2C+Dongming&rft.number=6989586&rft.date=2006-01-24&rft.externalDBID=n%2Fa&rft.externalDocID=06989586