Semiconductor integrated circuit device and process for manufacturing the same

• Main Authors: Yamada, Satoru, Oyu, Kiyonori, Tokunaga, Takafumi, Enomoto, Hiroyuki, Sekiguchi, Toshihiro
• Format: Patent
• Language: English
• Published: 29.04.2003

The present invention relates to a semiconductor integrated circuit device and a technique for manufacturing the same and, more particularly, to a technique suitably applied to manufacture of a semiconductor integrated circuit device having a DRAM (Dynamic Random Access Memory). In semiconductor integrated circuit devices having fine memory cells and a reduced bit line capacity, a side wall insulating film of gate electrodes (word line) is made of silicon nitride and a side wall insulating film of silicon oxide having a dielectric constant smaller than that of the side wall insulating film made of silicon nitride, thereby reducing the capacity for a word line formed over the gate electrode (word line). By setting the level of the upper end of the side wall insulating film made of silicon oxide to be lower than that of the top face of a cap insulating film, the diameter in the upper part of a plug buried in each space (contact holes) between the gate electrodes is set larger than the diameter in the bottom part to assure a contact area between the contact hole and a through hole formed on the contact hole.