Method and apparatus of fast modular reduction
Methods and apparatus reduce the computational load for computing r=x mod n, given two numbers x and n, where x is 2t bits long and n is t bits long. Such reduced computational loading in modular reduction schemes is useful for, at least, network communication systems that include modular reduction...
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Main Author | |
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Format | Patent |
Language | English |
Published |
30.10.2003
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Online Access | Get full text |
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