DATA SYNCHRONISATION PROCESS, AND TRANSMISSION AND RECEPTION INTERFACES

Especially simple interfaces for outputting or receiving data are proposed, which can be operated by an especially simple method. It is provided that three different levels can be realized on the bus. One of these levels (V 0 ) is used to generate a synchronization signal for the successive transmis...

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Bibliographic Details
Main Authors SCHLEUPEN, RICHARD, KOHL, WALTER, KOSS, THOMAS, JAKOBI, LOTHAR, NASSWETTER, GUENTER, SUELZLE, HELMUT
Format Patent
LanguageEnglish
Published 18.10.2001
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Summary:Especially simple interfaces for outputting or receiving data are proposed, which can be operated by an especially simple method. It is provided that three different levels can be realized on the bus. One of these levels (V 0 ) is used to generate a synchronization signal for the successive transmission of a high bit or a low bit. The individual bits are realized by means of the other two voltage levels (V 2 , V 1 ). In a modification, via interfaces or connecting lines, items of information that are represented with the aid of two different levels are exchanged. In the process, by means of different pulse lengths, both synchronization pulses and two different information pulses are generated.