Accurate Mapping of RNNs on Neuromorphic Hardware with Adaptive Spiking Neurons

Thanks to their parallel and sparse activity features, recurrent neural networks (RNNs) are well-suited for hardware implementation in low-power neuromorphic hardware. However, mapping rate-based RNNs to hardware-compatible spiking neural networks (SNNs) remains challenging. Here, we present a \({\S...

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Bibliographic Details
Published inarXiv.org
Main Authors Gauthier Boeshertz, Indiveri, Giacomo, Nair, Manu, Renner, Alpha
Format Paper
LanguageEnglish
Published Ithaca Cornell University Library, arXiv.org 18.07.2024
Subjects
Edge computing
Hardware
Mapping
Neural networks
Neuromorphic computing
Real time
Recurrent neural networks
Spiking
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Summary:Thanks to their parallel and sparse activity features, recurrent neural networks (RNNs) are well-suited for hardware implementation in low-power neuromorphic hardware. However, mapping rate-based RNNs to hardware-compatible spiking neural networks (SNNs) remains challenging. Here, we present a \({\Sigma}{\Delta}\)-low-pass RNN (lpRNN): an RNN architecture employing an adaptive spiking neuron model that encodes signals using \({\Sigma}{\Delta}\)-modulation and enables precise mapping. The \({\Sigma}{\Delta}\)-neuron communicates analog values using spike timing, and the dynamics of the lpRNN are set to match typical timescales for processing natural signals, such as speech. Our approach integrates rate and temporal coding, offering a robust solution for the efficient and accurate conversion of RNNs to SNNs. We demonstrate the implementation of the lpRNN on Intel's neuromorphic research chip Loihi, achieving state-of-the-art classification results on audio benchmarks using 3-bit weights. These results call for a deeper investigation of recurrency and adaptation in event-based systems, which may lead to insights for edge computing applications where power-efficient real-time inference is required.
ISSN:2331-8422