Low-Power 32-bit Dual-MAC 120 μW/MHz 1.0 V icyflex1 DSP/MCU Core Special Issue on the 34TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE (ESSCIRC)
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Published in | IEEE journal of solid-state circuits Vol. 44; no. 7; pp. 2055 - 2064 |
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Main Authors | , , , , , , , |
Format | Journal Article |
Language | English |
Published |
New York, NY
Institute of Electrical and Electronics Engineers
2009
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Subjects | |
Online Access | Get full text |
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Author | ARM, Claude RAMPOGNA, Flavio VOLET, Patrick PIGUET, Christian MASGONTY, Jean-Marc GYGER, Stève MORGAN, Marc NAGEL, Jean-Luc |
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Keywords | Performance evaluation RISC Customizable Instruction sets Microcontroller digital signal processor (DSP) processor architecture run-time reconfigurable ultra low power icyflex RISC processor Intellectual property core Power consumption VHDL language Integrated circuit 32 bit Processor Software Reconfigurable architectures Low-power electronics Digital signal processor Execution time |
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PublicationTitle | IEEE journal of solid-state circuits |
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SubjectTerms | Applied sciences Design. Technologies. Operation analysis. Testing Electronics Exact sciences and technology Integrated circuits Integrated circuits by function (including memories and processors) Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices |
Subtitle | Special Issue on the 34TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE (ESSCIRC) |
Title | Low-Power 32-bit Dual-MAC 120 μW/MHz 1.0 V icyflex1 DSP/MCU Core |
Volume | 44 |
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