High-Speed Low-Complexity Reed-Solomon Decoder using Pipelined Berlekamp-Massey Algorithm and Its Folded Architecture

• Published in: Journal of semiconductor technology and science Vol. 10; no. 3; pp. 193 - 202
• Main Authors: Park, Jeong-In, Lee, Ki-Hoon, Choi, Chang-Seok, Lee, Han-Ho
• Format: Journal Article
• Language: Korean
• Published: 2010
• Subjects: Reed-Solomon codes; pipelined; key equation solver; Berlekamp-Massey algorithm; VLSI; syndrome; folding
• ISSN: 1598-1657

This paper presents a high-speed low-complexity pipelined Reed-Solomon (RS) (255,239) decoder using pipelined reformulated inversionless Berlekamp-Massey (pRiBM) algorithm and its folded version (PF-RiBM). Also, this paper offers efficient pipelining and folding technique of the RS decoders. This architecture uses pipelined Galois-Field (GF) multipliers in the syndrome computation block, key equation solver (KES) block, Forney block, Chien search block and error correction block to enhance the clock frequency. A high-speed pipelined RS decoder based on the pRiBM algorithm and its folded version have been designed and implemented with 90-nm CMOS technology in a supply voltage of 1.1 V. The proposed RS(255,239) decoder operates at a clock frequency of 700 MHz using the pRiBM architecture and also operates at a clock frequency of 750 MHz using the PF-RiBM, respectively. The proposed architectures feature high clock frequency and low-complexity.