Online identification of semiconductor switching times in inverters with inductive load using field programmable gate arrays
The nonlinear behavior of inverters is mainly influenced by the interlocking and switching times of the semiconductors. In the following work, a method is presented that enables the possibility of an online identification of the switching times of the semiconductors. This information allows a compen...
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Published in | 2021 23rd European Conference on Power Electronics and Applications (EPE'21 ECCE Europe) pp. P1 - P10 |
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Main Authors | , , , |
Format | Conference Proceeding |
Language | English |
Published |
EPE Association
06.09.2021
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Subjects | |
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Abstract | The nonlinear behavior of inverters is mainly influenced by the interlocking and switching times of the semiconductors. In the following work, a method is presented that enables the possibility of an online identification of the switching times of the semiconductors. This information allows a compensation of the non-linear behavior, a reduction of the locking time and can be used for diagnostic purposes. First, a theoretical derivation of the method is made by considering different cases when switching of the inverter and deriving identification possibilities. The method is then extended so that the entire module is taken into account. Furthermore, a possible theoretical implementation is shown. After the methodology has been investigated with possible limitations, boundary conditions and with respect to real hardware, an implementation in the FPGA is performed. Finally, the results are presented, discussed and further improvements are presented in an outlook. |
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AbstractList | The nonlinear behavior of inverters is mainly influenced by the interlocking and switching times of the semiconductors. In the following work, a method is presented that enables the possibility of an online identification of the switching times of the semiconductors. This information allows a compensation of the non-linear behavior, a reduction of the locking time and can be used for diagnostic purposes. First, a theoretical derivation of the method is made by considering different cases when switching of the inverter and deriving identification possibilities. The method is then extended so that the entire module is taken into account. Furthermore, a possible theoretical implementation is shown. After the methodology has been investigated with possible limitations, boundary conditions and with respect to real hardware, an implementation in the FPGA is performed. Finally, the results are presented, discussed and further improvements are presented in an outlook. |
Author | Hahnlein, Stefan Doppelbauer, Martin Degel, Jan Philipp Kloffer, Christian |
Author_xml | – sequence: 1 givenname: Stefan surname: Hahnlein fullname: Hahnlein, Stefan email: Stefan.Haehnlein@kit.edu organization: Karlsruher Institut für Technologie (KIT) / Elektrotechnisches Institut (ETI),Karlsruhe,Germany,76131 – sequence: 2 givenname: Jan Philipp surname: Degel fullname: Degel, Jan Philipp organization: Karlsruher Institut für Technologie (KIT) / Elektrotechnisches Institut (ETI),Karlsruhe,Germany,76131 – sequence: 3 givenname: Christian surname: Kloffer fullname: Kloffer, Christian organization: Karlsruher Institut für Technologie (KIT) / Elektrotechnisches Institut (ETI),Karlsruhe,Germany,76131 – sequence: 4 givenname: Martin surname: Doppelbauer fullname: Doppelbauer, Martin organization: Karlsruher Institut für Technologie (KIT) / Elektrotechnisches Institut (ETI),Karlsruhe,Germany,76131 |
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Snippet | The nonlinear behavior of inverters is mainly influenced by the interlocking and switching times of the semiconductors. In the following work, a method is... |
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SubjectTerms | Boundary conditions Compensation DC-AC converters Device characterization Diagnostics Europe Field Programmable Gate Array (FPGA) Logic gates Measurement Power measurement Pulse width modulation Semiconductor Device Semiconductor device measurement Software for measurements Switches |
Title | Online identification of semiconductor switching times in inverters with inductive load using field programmable gate arrays |
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