RTP formed oxynitride via direct nitridation in N/sub 2
The continuous scale down of devices to smaller feature sizes in order to maximize integration density demands a decrease in the thickness of the gate dielectric in advanced complementary metal-oxide-semiconductor (CMOS) devices. Once the thickness of the SiO/sub 2/ is reduced below about 3 nm, the...
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Published in | Proceedings 2000 IEEE Hong Kong Electron Devices Meeting (Cat. No.00TH8503) pp. 104 - 107 |
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Main Authors | , , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
2000
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Subjects | |
Online Access | Get full text |
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Summary: | The continuous scale down of devices to smaller feature sizes in order to maximize integration density demands a decrease in the thickness of the gate dielectric in advanced complementary metal-oxide-semiconductor (CMOS) devices. Once the thickness of the SiO/sub 2/ is reduced below about 3 nm, the regime of direct tunneling becomes predominant resulting in large leakage current. When the thickness of SiO/sub 2/ is reduced below 2 nm, the reliability of the gate oxide becomes a major problem where alternative gate dielectrics must be considered. In this work, using a novel method via direct nitridation in N/sub 2/, two different processing approaches were undergone to produce rapid thermal processing (RTP) nitrided oxides or oxynitrides. One approach is the direct nitridation of the Si surface with N/sub 2/ gas at an elevated temperature (>1150/spl deg/C) to form Si/sub 3/N/sub 4/ followed by O/sub 2/ oxidation, while the second method simply involves O/sub 2/ oxidation of the Si wafer to form SiO/sub 2/ followed by N/sub 2/ nitridation. The aim of this work is to electrically characterise the ultrathin films and prove its viability as a SiO/sub 2/ substitute for future CMOS device generations. |
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ISBN: | 0780363043 9780780363045 |
DOI: | 10.1109/HKEDM.2000.904226 |