15.5 Cryo-CMOS circuits and systems for scalable quantum computing

• Published in: 2017 IEEE International Solid-State Circuits Conference (ISSCC) pp. 264 - 265
• Main Authors: Charbon, Edoardo, Sebastiano, Fabio, Babaie, Masoud, Vladimirescu, Andrei, Shahmohammadi, Mina, Staszewski, Robert Bogdan, Homulle, Harald A. R., Patra, Bishnu, van Dijk, Jeroen P. G., Incandela, Rosario M., Lin Song, Valizadehpasha, Bahador
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.02.2017
• Subjects: Cryogenics; Oscillators; Program processors; Quantum computing; Semiconductor device modeling; Substrates; Temperature sensors
• DOI: 10.1109/ISSCC.2017.7870362

Quantum computing holds the promise to achieve unprecedented computation power and to solve problems today intractable. State-of-the-art quantum processors consist of arrays of quantum bits (qubits) operating at a very low base temperature, typically a few tens of mK, as shown in Fig. 15.5.1 The qubit states degrade naturally after a certain time, upon loss of quantum coherence. For proper operation, an error-correcting loop must be implemented by a classical controller, which, in addition of handling execution of a quantum algorithm, reads the qubit state and performs the required corrections. However, while few qubits (~10) in today's quantum processors can be easily connected to a room-temperature controller, it appears extremely challenging, if not impossible, to manage the thousands of qubits required in practical quantum algorithms [1].