Analysis of a source hetrojunction LDMOS device with strained silicon channel
In this paper we propose a novel power MOSFET employing a source and drain hetrojunction as well as a thin strained silicon layer at the top of the channel and N-Drift regions. We discuss the physics involved in the operation of this device. Analysis using a 2D device simulator indicates improvement...
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Published in | 2011 19th Iranian Conference on Electrical Engineering p. 1 |
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Main Authors | , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.05.2011
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Subjects | |
Online Access | Get full text |
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Summary: | In this paper we propose a novel power MOSFET employing a source and drain hetrojunction as well as a thin strained silicon layer at the top of the channel and N-Drift regions. We discuss the physics involved in the operation of this device. Analysis using a 2D device simulator indicates improvements of 36.6%, 22.6% and 10% in current drivability, transconductance and cut off frequency respectively as compared with the traditional LDMOS structure. However, these improvements are accompanied by a suppression of 10% in the break down voltage. |
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ISBN: | 1457707306 9781457707308 |
ISSN: | 2164-7054 |