A pre-registered buffering method for iSER-based storage over IP SAN

Previous work shows that iSER-based storage is a data-intensive system that involves heavy checking for the data integrity during transmission. In this work, we address several issues and develop schemes to speed up the iSER-based storage system for the read/write operations, including iSCSI and iSE...

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Published inINC2010: 6th International Conference on Networked Computing pp. 1 - 4
Main Authors Hsu-Cheng Lin, Han-Chiang Chen, Shun-Chieh Lin
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.05.2010
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Abstract Previous work shows that iSER-based storage is a data-intensive system that involves heavy checking for the data integrity during transmission. In this work, we address several issues and develop schemes to speed up the iSER-based storage system for the read/write operations, including iSCSI and iSER modules integration, pre-registered buffer region design for iSER module, and data receiver thread design for iSCSI module. By integrating iSCSI and iSCSI Extensions to RDMA (iSER, a RDMA-capable protocol) running over Ammasso RDMA adapter, this work can reduce latency and increase throughput compared with pure iSCSI architecture. The experimental results show that the proposed system with low latency and high throughput is promising less CPU usage. Less CPU resources usage would be helpful for the network transmission, especially using low power CPUs, such as resource-limited embedded systems.
AbstractList Previous work shows that iSER-based storage is a data-intensive system that involves heavy checking for the data integrity during transmission. In this work, we address several issues and develop schemes to speed up the iSER-based storage system for the read/write operations, including iSCSI and iSER modules integration, pre-registered buffer region design for iSER module, and data receiver thread design for iSCSI module. By integrating iSCSI and iSCSI Extensions to RDMA (iSER, a RDMA-capable protocol) running over Ammasso RDMA adapter, this work can reduce latency and increase throughput compared with pure iSCSI architecture. The experimental results show that the proposed system with low latency and high throughput is promising less CPU usage. Less CPU resources usage would be helpful for the network transmission, especially using low power CPUs, such as resource-limited embedded systems.
Author Hsu-Cheng Lin
Shun-Chieh Lin
Han-Chiang Chen
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  surname: Han-Chiang Chen
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  surname: Shun-Chieh Lin
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  email: jason.lin@itri.org.tw
  organization: Dept. of Digital Home Service Applic. Technol., Home Networking Technol. Center, Tainan, Taiwan
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Snippet Previous work shows that iSER-based storage is a data-intensive system that involves heavy checking for the data integrity during transmission. In this work,...
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StartPage 1
SubjectTerms Access protocols
Buffer storage
Computer architecture
Computer interfaces
Delay
Embedded system
iSCSI
iSER
Storage area networks
Storage Network
Throughput
Title A pre-registered buffering method for iSER-based storage over IP SAN
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